Why this partnership is important

Creating reliable PCB reference designs from chip datasheets is meticulous work. Engineers need to read numerous pages, interpret diagrams, and correctly connect supporting components. By partnering with Diode Computers, Anthropic has focused Claude on this precise agentic task—reading chip documentation and providing a complete, customizable Zener schematic.

What is Zener—and why use it?

Zener is Diode’s specialized language (based on Starlark) for coding PCB schematics. Diode's open tools—including the pcb CLI—compile Zener to EDA tools like KiCad, incorporating software-like checking, versioning, and automation into hardware design.

What’s new: measurable improvements with Sonnet 4.5

Anthropic and Diode defined a practical workflow: Claude handles file operations, runs the Zener compiler, and uses the language documentation—resulting in a reference design that’s evaluated using a testbench (e.g., “≥ 22 µF between power and ground” rather than specific component checks). In blind evaluations among Claude models, the outputs of Sonnet 4.5 were preferred 8 out of 10 times by Diode's engineers. Detailed comparisons: 60% vs 40% against Opus 4 and 82% vs 18% against Sonnet 4.

Key benefits (for teams embracing this approach)

• Reduced datasheet errors: Enhanced capture of fine configuration details and schematic meanings.

• Code-first schematics: Zener supports diffs, reviews, CI checks, and templates—before exporting to familiar EDA.

• Ready for agentic workflow: The setup mirrors production agent patterns (tool interactions, file operations, graded results).

How it works (overview)

1. Provide Claude with the chip datasheet and a Zener project skeleton.

2. Enable controlled tool usage: Zener documentation, pcb compiler, file read/write, restricted shell access.

3. Request Claude to produce a complete, configurable reference design using Zener.

4. Evaluate with a testbench that includes result-oriented requirements (capacitance, modes).

5. Export to KiCad for human review, DRC, and BOM checks.

Practical steps you can take this week

• Set up Zener + pcb: Follow Diode’s quickstart and VS Code extension to create a sample project.

• Create a grading setup: Encapsulate high-level requirements (e.g., allowed ranges, placements) to provide useful signals to the model.

• Start with a specific chip family: Supply 1–2 representative datasheets and a basic parts library to minimize uncertainty.

• Run a small H2L loop (human-to-loop): Review Claude’s output, correct any misunderstandings, and feed examples back as reference modules.

• Export and verify in KiCad: Conduct ERC/DRC, generate a BOM, and document any differences from the datasheet’s application circuits.

Things to watch for

• Under-defined datasheets: Some requirements are not explicit; the graded testbench approach helps avoid fitting to overly specific checks.

• Understanding of language conventions: Early issues involved misinterpreting Zener conventions—maintain a brief “style guide” with common patterns for your team.

• Human review: Consider Claude’s output as a draft; always perform engineering review and toolchain verification prior to fabrication.

Why this is credible

Diode is developing a code-centric PCB design system and recently received funding to accelerate AI-supported board design, establishing itself as an influential player in EDA-related tools.

FAQs

What advancements has Claude contributed to PCB design?
With the Zener workflow and testbench evaluations, Claude captures datasheet nuances and Zener semantics better; Sonnet 4.5 designs were preferred 8 out of 10 times compared to previous Claude models. website.claude.com

Who collaborated with Anthropic for this improvement?
Diode Computers, developers of the Zener language and the pcb toolchain that compiles to KiCad. website.claude.com+1

What measurable improvements were accomplished?
In blind evaluations by Diode engineers: 60% vs 40% over Opus 4 and 82% vs 18% over Sonnet 4; overall, Sonnet 4.5 was preferred 8 out of 10 times. website.claude.com

Can teams implement this today?
Yes—install Zener/pcb, create a controlled agent environment (file operations, compiler accessibility), and start with a specific chip family plus a grading setup. docs.pcb.new+1